UC San Diego

Advances in semiconductor technology over the last few decades has caused an influx of electronic devices into our daily lives, leading to the emergence of the Internet-of-Things (IoT) era. The IoT is a cluster of many miniaturized devices (also called sensor nodes) that unobtrusively capture data from our lives and surrounding environment to improve our quality of life. The IoT is expected to have a transformative impact on a wide variety of applications ranging from biological sensing such as wearable electrocardiogram-recording (ECG) to track our well-being, to physical sensors for industrial and environmental monitoring, to entertainment and infrastructure related devices, such as audio devices, for smart-homes and smart-cities.

From a circuit design perspective, enabling the IoT requires overcoming an important technological hurdle: maximizing energy efficiency. With many of these nodes requiring uninterrupted seamless operation, a small form-factor, an unobtrusive or remote location, and high longevity, there are severe constraints on the power source (e.g., battery, energy harvester, etc.). Henceforth, enhancing the power efficiency is, by-far, the key challenge to be addressed for the practical deployment of such IoT sensor nodes.

Generically speaking, a typical IoT sensor node comprises two basic building blocks: 1) an analog front-end (AFE) with amplifiers and data-converters and, 2) a transmitter for wireless communication. Most AFEs for IoT applications need to amplify/acquire low bandwidth signals while introducing minimal circuit noise. Power efficiency is fundamentally limited by noise for these AFEs. Since many IoT transmitters only need to communicate to a nearby base-station, such as smartphone or smartwatch, the output power Pout delivered to the antenna is often low. Power efficiency is limited by frequency synthesis considerations for these transmitters. In this dissertation, multiple circuits and techniques to enhance the power efficiency of the aforementioned IoT blocks are proposed. These are demonstrated by three prototype chips, namely: 1) an amplifier for implantable ECG recording, 2) a data-convertor for precision audio, and 3) a transmitter for short-range, narrowband communication.

The ECG amplifier is intended for implantable recording. There is significant interest in implantable devices, in general, due to their unobtrusive nature, improved environmental artifact tolerance, and that some biological signals can be only be obtained in vivo. However, these are also associated with very stringent power budgets of only a few nanowatts (nWs). An ultra-low power, 13.9 nA ECG amplifier is first described. This work achieves state-of-the-art noise-efficiency and power-efficiency factors of less than unity, which correspond to ~3× improvements over prior sub-100-nW amplifiers. The key enabling idea, also the main contribution of this work, is an operational transconductance amplifier (OTA)-stacking technique that fundamentally improves the noise efficiency of noise limited amplifiers.

Next, the OTA-stacking technique was expanded for use in oversampling analog-to-digital converters (ADCs). This ADC is intended for audio devices for entertainment, smart-homes, automobiles, etc. where continuous-time delta-sigma modulators (CTΔΣMs) are often the power bottleneck for such devices. These ADCs need high dynamic range (DR), which is challenging with the power constrains associated with portable sensor nodes. Several techniques such as finite impulse response (FIR) feedback, 4-stage feedforward op-amp, tail-less operation, and OTA-stacking were integrated into a 3rd-order CTΔΣM to achieve near state-of-the-art performance. The ADC achieved >100 dB DR while consuming only 121 μW with a 2.1 dB improvement in the Scherier’s Figure of Merit (FoM) due solely to the OTA-stacking.

Lastly, a narrowband transmitter is reported for short-range wireless communication (<2 meters) over the 400 MHz MedRadio-band. Enabling the interconnection functionality for the IoT devices while being power-efficient is another critical challenge. A process, voltage, and temperature (PVT)-robust frequency synthesis technique using a crystal oscillator integrated with a passive polyphase filter was demonstrated. A state-of-the-art global efficiency of 27% at -17.5 dBm Pout and low power of 67 μW compared to prior sub-1 mW transmitters was achieved.